Description:
Being able to design logics is one of the important qualities in an Engineer. This event is called “Logic Bees”.
In this event, problems will test participant’s grasp over Digital Logic Design (which includes timers, counters, gates and flip flops etc. So, the pre-requisites of this competition are related courses of Digital Logic Design.
In Logic Bees, you can bring out the best logic for anything. Your ability to handle 0’s and 1’s, and your control over the ICs will be tested to the limits. In this event, your technical skills will be racing against time. This competition is best suited for DLD craze students.
Rules & Regulations:
In this competition, a question paper will be provided to the participants, and they will have to implement it on the breadboard. The person who implements the circuit correctly in the shortest time is declared winner. This competition will test the skills of circuit optimization, neatness of the circuit.
Judgment Rules:
Software’s allowed:
No software’s are required in this Competition as in this competition the participants will be provided with the necessary stationary (Charts, Markers, Ball pen, Pencils etc.)
Equipment:
74LS00 Quad NAND Gate
74LS02 Quad NOR Gate
74LS08 Quad AND Gate
74LS32 Quad OR Gate
74LS86 Quad XOR Gate
74LS04 HEX NOT Gate
74HC7277 Quad XNOR Gate Seven Segment (common cathode)
Registration:
Rs.500 per team, Maximum 3 members are allowed per team.(For University)
Winning Prize:
1st Position: Exclusive Prize
2nd Position: Exclusive Prize